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Getting started
User guide
API reference
Examples
Contribute
GitHub
Support
Download documentation in PDF
Section Navigation
EDB manager
Edb
Components
EdbHfss
configure_hfss_analysis_setup
configure_hfss_extents
create_bundle_wave_port
create_circuit_port_on_net
create_circuit_port_on_pin
create_coax_port_on_component
create_current_source_on_net
create_current_source_on_pin
create_differential_wave_port
create_edge_port_horizontal
create_edge_port_on_polygon
create_edge_port_vertical
create_hfss_ports_on_padstack
create_lumped_port_on_net
create_resistor_on_pin
create_rlc_boundary_on_pins
create_vertical_circuit_port_on_clipped_traces
create_voltage_source_on_net
create_voltage_source_on_pin
create_wave_port
get_layout_bounding_box
get_ports_number
get_trace_width_for_traces_with_ports
layout_defeaturing
set_coax_port_attributes
trim_component_reference_size
excitations
hfss_extent_info
probes
sources
LayoutValidation
Materials
Modeler
EdbNets
EdbSiwave
Stackup
EDB data classes
Simulation setup data
Simulation setup IO
Utilities
SIwave manager
PyAnsys
API reference
EDB manager
EdbHfss
excitations
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