The pyedb.generic.design_types library#
Summary#
Module detail#
- design_types.Edb(*, grpc: Literal[True], **kwargs) pyedb.grpc.edb.Edb#
- design_types.Edb(*, grpc: Literal[False] = False, **kwargs) pyedb.dotnet.edb.Edb
- design_types.Edb(*, grpc: bool, **kwargs) pyedb.grpc.edb.Edb | pyedb.dotnet.edb.Edb
Provides the EDB application interface.
This module inherits all objects that belong to EDB.
- Parameters:
- edbpath
str,optional Full path to the
aedbfolder. The variable can also contain the path to a layout to import. Allowed formats are BRD, XML (IPC2581), GDS, and DXF. The default isNone. For GDS import, the Ansys control file (also XML) should have the same name as the GDS file. Only the file extension differs.- cellname
str,optional Name of the cell to select. The default is
None.- isreadonlybool,
optional Whether to open EBD in read-only mode when it is owned by HFSS 3D Layout. The default is
False.- version
str,optional Version of EDB to use. The default is
"2021.2".- isaedtownedbool,
optional Whether to launch EDB from HFSS 3D Layout. The default is
False.- oproject
optional Reference to the AEDT project object.
- student_versionbool,
optional Whether to open the AEDT student version. The default is
False.- use_ppebool,
optional Whether to use PPE license. The default is
False.- technology_file
str,optional Full path to technology file to be converted to xml before importing or xml. Supported by GDS format only.
- grpcbool,
optional Whether to enable gRPC. Default value is
False.- layer_filter: str,optional
Layer filter .txt file.
- map_file
str,optional Layer map .map file.
- control_file
str,optional Path to the XML file. The default is
None, in which case an attempt is made to find the XML file in the same directory as the board file. To succeed, the XML file and board file must have the same name. Only the extension differs.
- edbpath
- Returns:
>>> from pyedb import Edb
# Create a new EDB instance
>>> edb = Edb()
# Open an existing AEDB database
>>> edb = Edb(edbpath="my_project.aedb")
# Import a board file (BRD, XML, GDS, etc.)
>>> edb = Edb(edbpath="my_board.brd")
Cutout Operation
# Simple cutout with signal and reference nets
>>> edb.cutout( >>> signal_list=["PCIe", "USB"], >>> reference_list=["GND"] >>> )
# Advanced cutout with custom parameters
>>> edb.cutout( >>> signal_list=["DDR"], >>> reference_list=["GND"], >>> extent_type="ConvexHull", >>> expansion_size=0.002, >>> use_round_corner=True, >>> output_aedb_path="cutout.aedb", >>> remove_single_pin_components=True >>> )
Exporting Designs
# Export to IPC2581 format
>>> edb.export_to_ipc2581("output.xml", units="millimeter")
# Export to HFSS project
>>> edb.export_hfss("hfss_output")
# Export to Q3D project
>>> edb.export_q3d("q3d_output", net_list=["PowerNet"])
# Export to Maxwell project
>>> edb.export_maxwell("maxwell_output")
Simulation Setup
# Create SIwave SYZ setup
>>> syz_setup = edb.create_siwave_syz_setup(name="GHz_Setup", start_freq="1GHz", stop_freq="10GHz")
# Create SIwave DC setup
>>> dc_setup = edb.create_siwave_dc_setup(name="DC_Analysis", use_dc_point=True)
# Solve with SIwave
>>> edb.solve_siwave()
Database Management
# Save database
>>> edb.save()
# Save as new database
>>> edb.save_as("new_project.aedb")
# Close database
>>> edb.close()
Stackup and Material Operations
# Access stackup layers
>>> for layer_name, layer in edb.stackup.layers.items(): >>> print(f"Layer: {layer_name}, Thickness: {layer.thickness}")
# Add new material
>>> edb.materials.add_material("MyMaterial", permittivity=4.3, loss_tangent=0.02)
# Change layer thickness
>>> edb.stackup["TopLayer"].thickness = "0.035mm"
Port Creation
# Create wave port between two pins
>>> wave_port = edb.source_excitation.create_port(positive_terminal=pin1, negative_terminal=pin2, port_type="Wave")
# Create lumped port
>>> lumped_port = edb.source_excitation.create_port(positive_terminal=via_terminal, port_type="Lumped")
Component Management
# Delete components by type
>>> edb.components.delete_component(["R1", "C2"])
# Set component properties
>>> edb.components["U1"].set_property("Value", "10nH")
Parametrization
# Auto-parametrize design elements
>>> params = edb.auto_parametrize_design(traces=True, pads=True, antipads=True, use_relative_variables=True) >>> print("Created parameters:", params)
Design Statistics
# Get layout statistics with area calculation
>>> stats = edb.get_statistics(compute_area=True) >>> print(f"Total nets: {stats.net_count}") >>> print(f"Total components: {stats.component_count}")
Layout Validation
# Run DRC check
>>> drc_errors = edb.layout_validation.run_drc() >>> print(f"Found {len(drc_errors)} DRC violations")
Differential Pairs
# Create differential pair
>>> edb.differential_pairs.create(positive_net="USB_P", negative_net="USB_N", name="USB_DP")
Workflow Automation
# Define and run workflow
>>> workflow = edb.workflow >>> workflow.add_task("Import", file_path="input.brd") >>> workflow.add_task("Cutout", signal_nets=["PCIe"]) >>> workflow.add_task("Export", format="IPC2581") >>> workflow.run()
- design_types.Siwave(specified_version=None)#
Siwave Class.
- design_types.app_map#